XCENA Raises $135 Million to Revolutionize AI Memory
Le brief IA que les pros lisent chaque soir
Les 7 actus IA du jour, décryptées en 5 min. Gratuit.
Inclus dès l'inscription : notre sélection des meilleurs guides & comparatifs IA.
Choisis ton rythme
Gratuit · Pas de spam · Désabonnement en 1 clic
Every time you interact with an artificial intelligence model like ChatGPT, a complex series of data transfers is initiated. This data leaves memory, passes through a CPU for preprocessing, heads to a GPU for intensive computation, and then returns to memory. This process repeats for each generated word, creating a structural bottleneck that relies on some of the most expensive and energy-consuming chips in the industry.
XCENA, a startup with offices in South Korea and the United States, is striving to address this inefficiency. Founded four years ago, the company has developed a chip that brings computing capabilities closer to DRAM memory. This approach could eliminate the costly back-and-forth between CPU, GPU, and memory by processing common data operations near the memory itself.
If this technology proves effective at scale, it could have significant implications for AI infrastructure costs. This potential has excited investors, allowing XCENA to raise $135 million in a Series B funding round. With this funding, the company's valuation reaches $570 million, and the total funds raised now amount to $185 million.
XCENA's CEO, Jin Kim, who co-founded the company in 2022 with CTO Dohun Kim and CPO Harry Juhyun Kim, all former employees of Samsung and SK Hynix, stated: "CPUs and GPUs have become smarter over the decades. Memory, however, has never evolved. XCENA wants to change that." He also emphasized that the recent rise in memory prices and related stocks indicates a broader shift in AI infrastructure towards memory-centric architectures. This month, the three companies dominating the global memory chip market — Samsung, SK Hynix, and Micron — each surpassed a valuation of one trillion dollars for the first time.
XCENA bets on the thesis that "inference is not just a computation problem; it is increasingly a memory scale problem," Kim said. XCENA's chip, the MX1, connects to the CPU via CXL (Compute Express Link), processing data before it leaves the memory module. What previously required 10 servers could potentially operate on a single one, thereby reducing infrastructure costs.
While GPUs excel at matrix multiplication, much of the orchestration of surrounding data, including preprocessing and KV cache management, still operates on CPUs. XCENA's chip handles these tasks directly within the memory module itself.
Demand for memory solutions has exploded since the second half of last year, and the company believes that timing is on its side. Discussions with several global memory suppliers are still in their early stages, although Kim declined to name them. The company's ideal customers are hyperscalers spending tens of billions annually on AI infrastructure, where even a small gain in memory efficiency can translate to hundreds of millions in savings.
The MX1 is still a prototype. Mass production of the chips is expected to roll off Samsung's foundry lines by the end of 2026, with revenue anticipated starting in 2027.
As neural processing unit (NPU) manufacturers compete to challenge Nvidia on training workloads, XCENA targets the memory-intensive layer that lies beneath all of that. XCENA's closest rivals include Astera Labs and Marvell, two Nasdaq-listed companies working on next-generation memory connectivity. Marvell is an established and significant player already active in the same field, Kim noted, adding that the differentiating factor lies in intellectual property. "We have thousands of cores," Kim said. Based on public specifications, Marvell's approach relies on a few general-purpose cores in comparison.
These cores are built on RISC-V — an open-source chip design blueprint — and specifically optimized for data processing, with each core deliberately kept small and efficient. Beyond the cores themselves, XCENA designs its own internal memory hierarchy, interconnect bus, and DRAM controller — a level of vertical integration that most chip companies, including the largest competitors, typically outsource.
Seoul-based venture capital firms Atinum and IMM Investment co-led the Series B funding round, with Corstone Asia and existing investors SBI Investment and Mirae Asset Capital. The company, which has over 90 employees spread between offices in Pangyo, a tech hub near Seoul, and Sunnyvale, is also in talks with international investors for additional funding.
Brief IA — L'actualité IA en français
L'essentiel de l'actualité de l'intelligence artificielle, décrypté et expliqué chaque jour.